What is “Ryzen ThreadRipper 3000 series” (Zen2-TR3)?
AMD’s Zen2 TR3 (“Starship”) is the “true” 2nd generation ZEN core on 7nm process shrink while the previous ZEN+ TR2 (“”) core was just an optimisation of the original ZEN TR that introduces many design improvements over both cores. Unlike desktop parts – a new socket “sTRX4” is introduced thus new mainboards based on the new chipset “TRX40” are required.
The list of changes vs. previous ZEN/ZEN+ is extensive thus performance delta is likely to be very different also:
- Built around “chiplets” of up to 2 CCX (“core complexes”) each of 4C/8T and 8MB L3 cache (7nm)
- Central I/O hub with memory controller(s) and PCIe 4.0 bridges connected through IF (“Infinity Fabric”) (12nm)
- Up to 4 chiplets on desktop platform thus up to 4x 2x 4C (32C/64T TR 3970X)
- 2x larger L3 cache per CCX thus up to 4x 2x 16MB (128MB) L3 cache (TR 3960X+)
- 60 PCIe 4.0 lanes (2x higher transfer rate over PCIe 3.0)
- 4x DDR4 memory controllers up to 4266Mt/s
- New sTRX4 Socket with AMD TRX40 chipset
Even with previous ThreadRippers AMD used to recommend UMA mode (interleave across nodes) rather than NUMA mode (interleave across channels only) – despite the fact that some CCXes naturally had to access memory through (other) CCXes with DRAM controllers at much higher latency. Now, with TR3 and sIO-based memory controllers there is a weaker affinity between cores/CCX/chiplets and DRAM controllers thus NUMA mode is pretty much gone.
SiSoftware has always “disagreed” with AMD on this – with our recommendation to always use NUMA mode and that even normal Ryzen should have a “fake NUMA” mode where each CCX/chiplet is a “NUMA node”. This would have instantly greatly improved performance as all NUMA-aware operating system (OS) schedulers would not migrate threads off NUMA modes (aka CCX/chiplets) nor would it require “Ryzen/TR custom power management profile” on Windows client/server.
While recent Windows kernels have improved matters (especially with custom profile), we still need to wait for 2020 kernel for better scheduling.
What’s new in the Ryzen2 core?
Micro-architecturally there are more changes that should improve performance:
- 256-bit (single-op) SIMD units 2x Fmacs (fixing a major deficiency in ZEN/ZEN+ cores)
- TLB (2nd level) increased (should help out-of-page access latencies that are somewhat high on ZEN/ZEN+)
- Memory latencies claim to be reduced through higher-speed memory (note all requests go through IF to Central I/O hub with memory controllers)
- Load/Store 32bytes/cycle (2x ZEN/ZEN+) to keep up with the 256-bit SIMD units (L1D bandwidth should be 2x)
- L3 cache is 2x ZEN/ZEN+ but higher latency (cache is exclusive)
- Infinity Fabric is 512-bit (2x ZEN/ZEN+) and can run 1x or 1/2x vs. DRAM clock (when higher than 3733Mt/s)
- AMD processors have thankfully not been affected by most of the vulnerabilities bar two (BTI/”Spectre”, SSB/”Spectre v4″) that have now been addressed in hardware.
- HWM-P (hardware performance state management) transitions latencies reduced (ACPI/CPPCv2)
In this article we test CPU core performance; please see our other articles on:
We are comparing the top-of-the-range ThreadRipper 3 (3970X, 3960X) with previous generation TR (2990X) and competing architectures with a view to upgrading to a mid-range high performance design.
|CPU Specifications||AMD Threadripper 3970X (Zen2)||AMD Threadripper 2990(W)X (Zen+)||AMD Threadripper 3960X (Zen2)||Intel Core i9-10980X (CSL-X)||AMD Ryzen 9 3950X (Zen2)
|Cores (CU) / Threads (SP)||32C / 64T||32C / 64T||24C / 48T||18C / 36T||16C / 32T||Same core count but still +78% more than CSL-X.|
|Topology||4 chiplets, each 2 CCX, each 4 cores (32C)||4 chiplet, 2 CCX, each 4 cores (32C)||4 chiplets, each 2 CCX, each 3 cores (24C)||Monolithic die||2 chiplets, each 2 CCX, each 4 cores (16C)||AMD uses discrete dies/chiplets unlike Intel.|
|Speed (Min / Max / Turbo)||3.7 [+23%] / 4.5GHz [+7%]
||3.0 / 4.2GHz||3.8 / 4.5GHz||3.0 / 4.6GHz||3.8 / 4.6GHz||Large base clock increase (+20%) over last gen.|
|Power (TDP / Turbo)||280W [+12%]||250W||280W||165 – 250W||105 – 135W||TDP has gone up a bit [+12%]|
|L1D / L1I Caches||32x 32kB 8-way / 32x 32kB 8-way||32x 32kB 8-way / 32x 64kB 4-way||24x 32kB 8-way / 24x 64kB 4-way||18x 32kB 8-way / 8x 18kB 8-way||16x 32kB 8-way / 16x 32kB 8-way||TR3 matches L1I with Intel (1/2x ZEN+ but 8-way), L1D is unchanged (also matches Intel)|
|L2 Caches||32x 512kB (16MB) 8-way||32x 512kB (16MB) 8-way||24x 512kB (12MB) 8-way||18x 1MB (18MB) 16-way||16x 512kB (8MB) 8-way||No L2 changes and almost a match for Intel.|
|L3 Caches||8x 16MB (128MB) 16-way||8x 8MB (64MB) 16-way||8x 8MB (128MB) 16-way||24.75 11-way||4x 16MB (64MB) 16-way||L3 is 2x ZEN/ZEN+ and thus 5x (five times) CSL-X|
|Mitigations for Vulnerabilities||BTI/”Spectre”, SSB/”Spectre v4″ hardware||BTI/”Spectre”, SSB/”Spectre v4″ software/firmware||BTI/”Spectre”, SSB/”Spectre v4″ hardware||RDCL/”Meltdown”, L1TF hardware, BTI/”Spectre”, MDS/”Zombieload”, software/firmware||BTI/”Spectre”, SSB/”Spectre v4″ hardware||TR3 addresses the remaining 2 vulnerabilities while Intel was forced to add MDS to its long list…|
|Microcode||MU-8F3100-25||MU-8F0802-0B||MU-8F3100-25||MU-065507-29||MU-8F7100-11||The latest microcodes included in the respective BIOS/Windows have been loaded.|
|SIMD Units||256-bit AVX/FMA3/AVX2||128-bit AVX/FMA3/AVX2||256bit AVX/FMA3/AVX2||512-bit AVX512||256bit AVX/FMA3/AVX2||TR3 finally matches Intel but CSL-X’s secret weapon is AVX512 with even consumer CPUs able to do 2x 512-bit FMA ops.|
We are testing native arithmetic, SIMD and cryptography performance using the highest performing instruction sets (AVX2, FMA3, AVX, etc.). Ryzen2 supports all modern instruction sets including AVX2, FMA3 and even more like SHA HWA but not AVX-512.
Results Interpretation: Higher values (GOPS, MB/s, etc.) mean better performance.
Environment: Windows 10 x64, latest AMD and Intel drivers. 2MB “large pages” were enabled and in use. Turbo / Boost was enabled on all configurations. All mitigations for vulnerabilities (Meltdown, Spectre, L1TF, MDS, etc.) were enabled as per Windows default where applicable.
Ryzen2 (unlike Ryzen1/+) has no trouble with SIMD code due to its widened SIMD units (256-bit) and thus soundly beats the opposition into dust (CFL-R 9900K flagship) sometimes more than just core count increase alone (+50% i.e. 12 cores vs. 8). Sometimes it even beats the AVX512 opposition (SKL-X 7900K) with more cores (10 cores vs. 12).
The only “problematic” algorithms are the memory bound ones where the cores/threads (due to SMT we have 24!) are starved for data and due to contention we see performance lower than less-core devices. While larger caches help (thus the massive 4x 16MB L3 caches) higher clocked memory should be used to match the additional core requirements.
SiSoftware Official Ranker Scores
Final Thoughts / Conclusions
Executive Summary: Ryzen2 is phenomenal and a huge upgrade over Ryzen1/+ that (most) AM4 users can enjoy and Intel has no answer to. 10/10.
Just as original Ryzen forced Intel to increase (double really) core counts to match (from 4 to 6 then 8), Ryzen2 will force Intel to come up with even more (and better) cores in order to compete. 3900X with its 12-cores soundly beats CFL-R 9900K (8-cores) in just about all benchmarks and in some tests goes toe-to-toe with HEDT SKL-X AVX512-enabled (10-cores) except in memory-bound algorithms where the 4 DDR4 memory channels with 2x more bandwidth count. For that you need ThreadRipper!
Ryzen1/+ was already competitive with Intel on integer and floating-point (non-SIMD) workloads but would fare badly on SIMD (AVX/FMA3/AVX2) workloads due to its 128-bit units; Ryzen2 “fixes” this issue, with its 256-bit units matching Intel. Only SKL-X with its 512-bit units (AVX512) is faster and Intel will have to finally include AVX512 for consumer CPUs in order to compete (IceLake?).
For compute-bound workloads, the forthcoming 3950X with its 16-cores/32-threads brings unprecedented performance to the consumer/desktop segment pretty much unheard of just a few years ago when 4-core/8-threads (e.g. 7700K) were all you could hope for – unless paying a lot more for HEDT where 8/10-core CPUs were far far more expensive. Naturally we shall see how the reduced memory bandwidth affects its performance with likely very fast DDR4 memory (4300Mt/s+) required for best performance.
Let’s also remember than Ryzen2 adds hardware mitigation to its remaining 2 vulnerabilities while Intel has been forced to add MDS/”Zombieload” even to its very latest CFL-R that now loses its trump card: hardware RDCL/”Meltdown” fix not to forget the recommendation to disable SMT/Hyperthreading that would mean a sizeable performance drop.
What is astonishing is that TDP has remained similar and with a BIOS/firmware upgrade, owners of older 300-series boards can now upgrade to these CPUs – and likely not even change the cooler unit! Naturally for PCIe4.0 a 500-series board is recommended and 400-series boards do support more features in Ryzen2/+ but let’s remember than on Intel you can only go back/forward 1 generation even though there is pretty much no core difference from Skylake (Gen 6) to Coffeelake-R (Gen 9)!
From top-end (3950X), high-end (3800X) to low-end/APU (3200G) Ryzen2 is such a compelling choice it is hard to recommend anything else… at least at this time…